FIG. 1 shows a schematic diagram of a conventional LCD panel and a driving circuit thereof. Generally, an LCD panel 10 is divided into a display area 12 and a non-display area 14. The display area 12 comprises a thin-film transistor (TFT) array, and the non-display area 14 comprises a gate driver 20, a master source driver 40 and a slave source driver 60 for controlling transistors of the TFT array.
Taking an LCD panel with a resolution of 800*480 as an example, the gate driver 20 needs 480 lines connected to the TFT array to control each of the 480 rows, and therefore the gate driver 20 is also referred as a row driver. The master source driver 40 and the slave source driver 60 are referred as column drivers. Take a TFT array controlled by red (R), green (G) and blue (B) colors as an example. The master source driver 40 and the slave source driver 60 need 2400 (800*3) lines connected to the TFT array to control 800 columns. Hence, the master source driver 40 needs 1200 lines and the slave source driver 60 needs 1200 lines.
Conventionally, a display controller 82 on a circuit board 80 outside the LCD panel 10 outputs a first digital image signal and a second digital image signal to the master source driver 40 and the slave source driver 60 on the LCD panel 10 via two flexible print circuits (FPC) 42 and 44, respectively. The master source driver 40 generates a gate driver signal to the gate driver 20 according to the first digital image signal.
The first digital image signal and the second digital image signal outputted by the display controller 82 are of transistor-transistor logic (TTL) logic level or complementary metal-oxide semiconductor (CMOS) logic level. That is, the high level is 3.3 V and the low level is 0 V. Similarly, the gate driving signal outputted by the master source driver 40 is also of a TTL or CMOS logic level.
Cost and area of the FPCs 42 and 44 connected between the circuit board 80 and the LCD panel 10 are proportional to each other.